Sequential memories, such as FIFOs and LIFOs, are often used as a buffer between circuits. These memories are referred as sequential because data is output in a predetermined sequence corresponding to the order in which it was input. Sequential memories allow circuits operating at different input/output speeds to communicate with one another. Early sequential memories comprise shift registers which serially stored incoming data units at a desired speed and read out the stored data units at a different speed. Generally, shift register implementations of sequential memories are of limited storage and have unacceptable delay times, and therefore, are unsuitable for many operations. More recently, random access memories have been developed in which pointers are used to implement the first-in, first-out or last-in, last-out I/O sequence.
One problem with random access implementations of sequential memories is that the status generators used to generate flags regarding the status of the memories (such as FULL and EMPTY) are not synchronous with either the READ or WRITE clocks, and therefore the signals may result in a metastable condition. Metastability is a phenomena which occurs in any device which has clocked latches where the data input and clock are not synchronized. Normally a latch will latch a state of either low or high but statistically can latch at a state which is neither low nor high. This metastable state may continue for some time and is therefore undesirable.
One method of reducing the occurrence of metastable conditions is to propagate the status flags through two or more stages which are synchronized to a clock. This method assumes that if a metastable state occurs in the first stage, it will resolved by the second stage. A consequence of the two-stage synchronizing buffer is that flags are delayed from their destination by the stages. Consequently, the data access times may be greatly reduced.
Therefore, a need has arisen for a metastable resistant sequential memory having decreased data access times.